Synopsys, Inc. has just released a complete hardware and software IP building
block optimized for a wide range of ultra-low power embedded sensor and control
applications.
"Embedded sensor and control applications require a high level of integration with minimal power and area," said John Koeter, vice president of marketing for IP and Prototyping at Synopsys.
To achieve this goal, he said, the company's Sensor and Control IP Subsystem integrates the DesignWare ARC EM4, EM6, EM5D or EM7D 32-bit processors, delivering efficient real-time control and DSP performance required for ultra-low power sensor- and control-based applications.
Newly integrated peripherals include a UART for serial communication as well as a Pulse Width Modulation (PWM) block and Digital-to-Analog Converter (DAC) interface for actuator/motor control functions.
An optional IEEE 754-2008 compliant floating point unit (FPU) reduces energy consumption by up to 10X for sensor fusion applications implementing floating point operations. He said designers using the DesignWare building block are provided with a pre-verified, SoC-ready IP subsystem that delivers the energy- efficient processing required in markets such as the Internet of Things (IoT).
Koeter said the subsystem is designed to process data from digital and analog sensors and always-on audio sources with minimal power consumption. "This enables offloading of the host processor and more efficient processing of the data,
" he said.
The fully configurable subsystem includes the choice of an ARC EM4, EM6, EM5D or EM7D processor. All the processors support up to 2 MB of closely coupled memory (CCM) for both instruction and data, while the EM6 and EM7D also incorporate up to 32 KB of instruction and data cache for maximum system performance and flexibility.
The EM5D and EM7D provide developers with a high-efficiency control and signal processing capability that gives them access to more than 100 DSP instructions. Included in the subsystem are integrated UART, PWM and ARM AMBA APB interface peripherals combined with the configurable GPIO, SPI, I2C and ADC/DAC interfaces for a variety of off-chip sensor and actuator connections.
Targeted at designs where it is necessary to process the extensive amount of data in sensor fusion applications, the subsystem includes a rich library of off-the-shelf DSP functions supporting filtering, correlation, matrix/vector, decimation/ interpolation and complex math operations.
"Designers can implement these sensor-specific DSP functions in hardware using a combination of native DSP instructions within the EM5D or EM7D processor and tightly coupled hardware accelerators," said Koeter, "to boost performance efficiency and reduce power consumption by up to 85 percent compared to discrete solutions. "
An optional IEEE 754-2008 compliant FPU reduces energy consumption by up to 10X for sensor applications requiring single- or double-precision floating point operations. Additionally, the ARC Processor EXtension (APEX) technology enables designers to add their own user-defined instructions or existing hardware to the processor.
"Embedded sensor and control applications require a high level of integration with minimal power and area," said John Koeter, vice president of marketing for IP and Prototyping at Synopsys.
To achieve this goal, he said, the company's Sensor and Control IP Subsystem integrates the DesignWare ARC EM4, EM6, EM5D or EM7D 32-bit processors, delivering efficient real-time control and DSP performance required for ultra-low power sensor- and control-based applications.
Newly integrated peripherals include a UART for serial communication as well as a Pulse Width Modulation (PWM) block and Digital-to-Analog Converter (DAC) interface for actuator/motor control functions.
An optional IEEE 754-2008 compliant floating point unit (FPU) reduces energy consumption by up to 10X for sensor fusion applications implementing floating point operations. He said designers using the DesignWare building block are provided with a pre-verified, SoC-ready IP subsystem that delivers the energy- efficient processing required in markets such as the Internet of Things (IoT).
Koeter said the subsystem is designed to process data from digital and analog sensors and always-on audio sources with minimal power consumption. "This enables offloading of the host processor and more efficient processing of the data,
" he said.
The fully configurable subsystem includes the choice of an ARC EM4, EM6, EM5D or EM7D processor. All the processors support up to 2 MB of closely coupled memory (CCM) for both instruction and data, while the EM6 and EM7D also incorporate up to 32 KB of instruction and data cache for maximum system performance and flexibility.
The EM5D and EM7D provide developers with a high-efficiency control and signal processing capability that gives them access to more than 100 DSP instructions. Included in the subsystem are integrated UART, PWM and ARM AMBA APB interface peripherals combined with the configurable GPIO, SPI, I2C and ADC/DAC interfaces for a variety of off-chip sensor and actuator connections.
Targeted at designs where it is necessary to process the extensive amount of data in sensor fusion applications, the subsystem includes a rich library of off-the-shelf DSP functions supporting filtering, correlation, matrix/vector, decimation/ interpolation and complex math operations.
"Designers can implement these sensor-specific DSP functions in hardware using a combination of native DSP instructions within the EM5D or EM7D processor and tightly coupled hardware accelerators," said Koeter, "to boost performance efficiency and reduce power consumption by up to 85 percent compared to discrete solutions. "
An optional IEEE 754-2008 compliant FPU reduces energy consumption by up to 10X for sensor applications requiring single- or double-precision floating point operations. Additionally, the ARC Processor EXtension (APEX) technology enables designers to add their own user-defined instructions or existing hardware to the processor.
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