INTRODUCTION
B.1 General explanation of memory areas
B.2 IR memory area
B.3 SR memory area
B.4 AR memory area
B.5 PC memory area
Introduction
Purpose of this appendix is to explain certain memory areas in detail. As the following tables cover whole memory, there are options left unused in this book. They should be skipped during the first reading, and used later according to needs.
B.1 General explanation of memory areas
Memory of PLC controller consists of several areas, some of these having predefined functions.
| Data area | Word(s) | Bit(s) | Function | |
| IR area | input area | IR 000 - IR 009 (10 words) | IR 00000 - IR 00915 (160 bits) | These bits may be assigned to an external I/O connection. Some of these have direct output on screw terminal (for example, IR000.00 - IR000.05 and IR010.00 - IR010.03 with CPM1A model) |
| output area | IR 010 - IR 019 (10 words) | IR 01000 - IR 01915 (160 bits) | ||
| working area | IR 200 - IR 231 (32 words) | IR 20000 - IR 23115 (512 bits) | Working bits that can be used freely in the program. They are commonly used as swap bits | |
| SR area | SR 232 - SR 255 (24 words) | SR23200 - SR25515 (384 bits) | Special functions, such as flags and control bits | |
| TR area | --- | TR 0 - TR 7 (8 bits) | Temporary storage of ON/OFF states when jump takes place | |
| HR area | HR 00 - HR 19 (20 words) | HR0000 - HR1915 (320 bits) | Data storage; these keep their states when power is off | |
| AR area | AR 00 - AR 15 (16 words) | AR0000 - AR1515 (256 bits) | Special functions, such as flags and control bits | |
| LR area | LR 00 - LR 15 (16 words) | LR0000 - LR1515 (256 bits) | 1:1 connection with another PC | |
| Timer/counter area | TC 000 - TC 127 (timer/counter numbers) | Same numbers are used for both timers and counters | ||
| DM area | Read/write | DM 0000 - DM 0999 and DM 1022 - DM 1023 (1002 words) | --- | Data of DM area may be accessed only in word form. Words keep their contents after the power is off |
| Error writing | DM 1000 - DM 1021 (22 words) | --- | Part of the memory for storing the time and code of error that occurred. When not used for this purpose, they can be used as regular DM words for reading and writing. They cannot be changed from within the program | |
| Read only | DM 6144 - DM 6599 (456 words) | --- | ||
| PC setup | DM 6600 - DM 6655 (56 words) | --- |
Storing various parameters for controlling the PC
| |
Note:
1. IR and LR bits, when not used to their purpose, may be used as working bits.
2. Contents of HR area, LR area, counter and DM area for reading/writing is stored within backup condenser. On 25C, condenser keeps the memory contents for up to 20 days.
3. When accessing the current value of PV, TC numbers used for data have the form of word. When accessing the Completing flags, they are used as data bits. 4. Data from DM6144 to DM6655 must not be changed from within the program, but can be changed by peripheral device.
1. IR and LR bits, when not used to their purpose, may be used as working bits.
2. Contents of HR area, LR area, counter and DM area for reading/writing is stored within backup condenser. On 25C, condenser keeps the memory contents for up to 20 days.
3. When accessing the current value of PV, TC numbers used for data have the form of word. When accessing the Completing flags, they are used as data bits. 4. Data from DM6144 to DM6655 must not be changed from within the program, but can be changed by peripheral device.
B.2. SR memory area
IR area doesn’t have predefined memory locations, but is meant for general use in the program. Of all the locations this memory area consists of, only those directly connected to PLC controller input/output lines are of interest for this appendix.
IR area can be divided into 3 parts:
1. Input area is located from word IR000 to IR009, totaling 160 bits. Most important of these are in the word IR000 because they are directly connected to screw terminal of PLC controller. Input IR000.01 is directly connected to screw terminal marked with 01 on the casing of the PLC controller.
2. Output area is located from word IR010 to IR019, totaling 160 bits. Most important of these are in the word IR010 because they are directly connected to screw terminal of PLC controller. Output IR000.00 is directly connected to screw terminal marked with 00 on the casing of the PLC controller.
3. Working area is located from word IR200 to IR231 totaling 512 bits for general use.
As IR memory area does not have predefined memory locations, more detailed explanations are not necessary.
IR area can be divided into 3 parts:
1. Input area is located from word IR000 to IR009, totaling 160 bits. Most important of these are in the word IR000 because they are directly connected to screw terminal of PLC controller. Input IR000.01 is directly connected to screw terminal marked with 01 on the casing of the PLC controller.
2. Output area is located from word IR010 to IR019, totaling 160 bits. Most important of these are in the word IR010 because they are directly connected to screw terminal of PLC controller. Output IR000.00 is directly connected to screw terminal marked with 00 on the casing of the PLC controller.
3. Working area is located from word IR200 to IR231 totaling 512 bits for general use.
As IR memory area does not have predefined memory locations, more detailed explanations are not necessary.
B.3. IR memory area
Unlike IR area, SR area does have predefined memory locations. These bits are usually tied to the PLC controller work or contain current and set values of different functions. Purpose of specific memory locations of SR area is explained in the following table:
| Words | Bits | Function |
| SR 232 - SR 235 | 00 - 15 | Input area for macro functions. Contains input operands for MCRO(99) (may be used for working bits, when MCRO(99) is not used) |
| SR 236 - SR 239 | 00 - 15 | Output area for macro functions. Contains output operands for MCRO(99) (may be used for working bits, when MCRO(99) is not used) |
| SR 240 | 00 - 15 | Contains set value SV, when input interrupt 0 is used in counter mode (4 hexadecimal digits) (may be used for working bits, when input interrupt 0 is not used in counter mode) |
| SR 241 | 00 - 15 | Contains set value SV, when input interrupt 1 is used in counter mode (4 hexadecimal digits) (may be used for working bits, when input interrupt 1 is not used in counter mode) |
| SR 242 | 00 - 15 | Contains set value SV, when input interrupt 2 is used in counter mode (4 hexadecimal digits) (may be used for working bits, when input interrupt 2 is not used in counter mode) |
| SR 243 | 00 - 15 | Contains set value SV, when input interrupt 3 is used in counter mode (4 hexadecimal digits) (may be used for working bits, when input interrupt 3 is not used in counter mode) |
| SR 244 | 00 - 15 | Contains current value (PV-1), when input interrupt 0 is used in counter mode (4 hexadecimal digits) |
| SR 245 | 00 - 15 | Contains current value (PV-1), when input interrupt 1 is used in counter mode (4 hexadecimal digits) |
| SR 246 | 00 - 15 | Contains current value (PV-1), when input interrupt 2 is used in counter mode (4 hexadecimal digits) |
| SR 247 | 00 - 15 | Contains current value (PV-1), when input interrupt 3 is used in counter mode (4 hexadecimal digits) |
| SR 248, SR 249 | 00 - 15 | Contains current value PV of the high-speed counter (may be used for working bits, when high-speed counter is not used) |
| SR 250 | 00 - 15 | Analog setting of value 0. Keeps 4 digit BCD value (0000 - 0200) set via analog potentiometer on the PLC controller casing. |
| SR 251 | 00 - 15 | Analog setting of value 1. Keeps 4 digit BCD value (0000 - 0200) set via analog potentiometer on the PLC controller casing. |
| SR 252 | 00 | Reset of the high-speed counter |
| 01 - 07 | Not used | |
| 08 | Peripheral port. Switches on for the reset of the peripheral port (this doesn't apply to a case when peripheral device is connected). Bit automatically changes state to OFF after the reset | |
| 09 | Not used | |
| 10 | PLC Setup Reset Bit. When on, it initializes PC setup (DM6600-DM6655). It automatically goes to OFF after the reset. This applies only if the PC is in PROGRAM mode | |
| 11 | Forced Status Hold Bit. OFF: bits used in the operation of forced set/reset are cleared when changing from PROGRAM to MONITOR mode. ON: bits used in the operation of forced set/reset keep their states when changing from PROGRAM to MONITOR mode. | |
| 12 | I/O Hold bit. OFF: IR and LR bits are reset when starting or ending an operation. ON: IR and LR bits keep their states when starting or ending an operation. | |
| 13 | Not used | |
| 14 | Error Log Reset Bit. Bit state OFF clears the record of error taking place. Bit automatically goes off after the operation | |
| 15 | Not used | |
| SR 253 | 00 - 07 | FAL error code. Location contains error code (2 digit number). FAL number is stored at this location upon executing FAL(06) or FAL(07) instructions. Location contents are reset upon executing FAL 00 instruction or by clearing an error from peripheral device |
| 08 | Not used | |
| 09 | Cycle Time Overrun Flag. Bit goes to ON when program length doesn't allow cycle of input/output scanning to be executed in a specified time period | |
| 10 - 12 | Not used | |
| 13 | Flag always on | |
| 14 | Flag always off | |
| 15 | First Cycle Flag. Goes ON during the first cycle at the beginning of the operation | |
| SR 254 | 00 | 1 min clock impulse (30s on, 30s off) |
| 01 | 0.02s clock impulse (0.01s on, 0.01s off) | |
| 02 | Negative (N) flag | |
| 03 - 05 | Not used | |
| 06 | Differential Monitor Flag | |
| 07 | STEP(8) execution flag | |
| 08 - 15 | Not used | |
| SR 255 | 00 | 0.1s clock impulse (0.05s on, 0.05s off) |
| 01 | 0.2s clock impulse (0.1s on, 0.1s off) | |
| 02 | 1.0s clock impulse (0.5s on, 0.5s off) | |
| 03 | Instruction Execution Error (ER) Flag. Changes state to ON if error occurs during instruction execution | |
| 04 | Carry (CY) flag | |
| 05 | "Greater than" (GR) flag | |
| 06 | "Equals" (EQ) flag | |
| 07 | "Less than" (LE) flag | |
| 08 - 15 | Not used |
B.4. AR memory area
Purpose of this memory area is to provide information on PLC controller state, malfunctions and some system data. Memory locations of this area keep their states after the power has been shut down.
| Word(s) | Bit(s) | Function |
| AR00 and AR01 | 00 - 15 | Not used |
| AR02 | 00 | Status flag of the first I/O unit for expanding I/O lines (I/O units status flag) |
| 01 | Status flag of the second I/O unit for expanding I/O lines (I/O units status flag) | |
| 02 | Status flag of the third I/O unit for expanding I/O lines (I/O units status flag) | |
| 03 - 07 | Not used | |
| 12 - 15 | Number of connected I/O units | |
| AR03 - AR07 | 00 - 15 | Not used |
| AR08 | 00 - 07 | Not used |
| 08 - 11 | Peripheral device error code | |
| 12 | Flag of peripheral device error | |
| 13 | Peripheral Device Transmission Enabled Flag | |
| 14 - 15 | Not used | |
| AR09 | 00 - 15 | Not used |
| AR10 | 00 - 15 | Power-off counter. Contains 4-digit BCD value |
| AR11 | 00 - 07 | High-speed Counter Range Comparison Flags |
| 08 - 14 | Not used | |
| 15 | Pulse Output Status. ON: stopped; OFF: Impulse at output | |
| AR12 | 00 - 15 | Not used |
| AR13 | 00 | Power-up PC Setup Error Flag. Goes ON when error occurs in area DM 6600 - DM 6614 |
| 01 | Start-up PC Setup Error Flag. Goes ON when error occurs in area DM 6615 - DM 6644 | |
| 02 | RUN PC Setup Error Flag. Goes ON when error occurs in area DM 6645 - DM 6655 | |
| 03 - 04 | Not used | |
| 05 | Long Cycle Time Flag. Goes ON if real cycle length exceeds length set in DM 6619 | |
| 06 - 07 | Not used | |
| 08 | Memory Area Specification Error Flag. Goes ON when non-existing address is specified in the program | |
| 09 | Flash Memory Error Flag | |
| 10 | Read-only DM Error Flag. Goes ON when checksum error occurs in DM 6144 - DM 6599 range | |
| 11 | PC Setup Error Flag. Goes ON when checksum error occurs in PC Setup area | |
| 12 | Program Error Flag. Goes ON when checksum error occurs in program memory (UM) or inappropriate instruction is executed | |
| 13 | Expansion Instruction Error Flag | |
| 14 - 15 | Not used | |
| AR14 | 00 - 15 | Maximum Cycle Time. 4 BCD digits. Cleared at the beginning of the operation |
| AR15 | 00 - 15 | Current Cycle Time. 4 BCD digits. Not cleared when the operation ends |
Note:
1. IR and LR bits when not used for their function may be used as working bits.
2. Contents of HR area, LR area, counter, and DM area for reading/writing are kept by battery of central processing unit. In case that the battery is removed or malfunction occurs, this data will be lost.
3. When accessing the current value of PV, TC numbers used for data have form of word. When accessing Completing flags, they are used as data bits.
4. Data stored from DM6144 to DM6655 cannot be changed from within the program, but can be changed by peripheral device.
5. Program and data from DM 6144 to DM 6655 are stored in the flash memory.
1. IR and LR bits when not used for their function may be used as working bits.
2. Contents of HR area, LR area, counter, and DM area for reading/writing are kept by battery of central processing unit. In case that the battery is removed or malfunction occurs, this data will be lost.
3. When accessing the current value of PV, TC numbers used for data have form of word. When accessing Completing flags, they are used as data bits.
4. Data stored from DM6144 to DM6655 cannot be changed from within the program, but can be changed by peripheral device.
5. Program and data from DM 6144 to DM 6655 are stored in the flash memory.
B.5. PC memory area
PLC setup area can be roughly divided into 4 categories:
1. Settings related to basic operations of PLC controller and I/O processes
2. Settings related to cycle duration
3. Settings related to interrupts
4. Settings related to communication.
1. Settings related to basic operations of PLC controller and I/O processes
2. Settings related to cycle duration
3. Settings related to interrupts
4. Settings related to communication.
| Word(s) | Bit(s) | Function |
| Settings are active only upon resetting the PLC and sending data from PC to PLC | ||
| DM 6600 | 00 - 07 | Startup Mode. Active only if bits 08 - 15 are set to 02. 00: PROGRAM; 01: MONITOR; 02: RUN |
| 08 - 15 | Startup mode designation. 00: programming console switch; 01: proceeds in the mode last used before turning off the power; 02: settings in 00 - 07 | |
| DM 6601 | 00 - 07 | Not used (set to 0) |
| 08 - 11 | IOM Hold Bit (SR 25212). 0: Reset; 1: Keeps the state | |
| 12 - 15 | Forced Status Hold Bit (SR 25211). 0: Reset; 1: Keeps the state | |
| DM 6602 | 00 - 03 | Writing to program memory protection. 00: OFF; 01: ON (except for DM 6602) |
| 04 - 07 | Programming console display language. 00: English; 01: Japanese | |
| 08 - 11 | Not used | |
| DM 6603 | 00 - 15 | Not used |
| DM 6604 | 00 - 07 | 00: in case of battery malfunction, error will not be generated; 01: in case of battery malfunction, error will be generated |
| 08 - 15 | Not used | |
| DM 6605 - DM 6614 | 00 - 15 | Not used |
| Cycle Time Settings (DM 6615 - DM 6619) take effect after the transfer to PC area, next time you start working | ||
| DM 6615 - DM 6616 | 00 - 15 | Not used |
| DM 6617 | 00 - 07 | Servicing time for peripheral port. Active when bits 08 - 15 are set to 01. It is expressed in percentage of cycle time duration (00 to 99 (BCD)) |
| 08 - 15 | Peripheral port servicing setting enable. 00: 5% of cycle duration; 01: time defined in first half of the word | |
| DM 6618 | 00 - 07 | Cycle monitor time. Settings are identical to those of the second half of the previous word |
| 08 - 15 | Cycle monitor enable (Setting in 00 to 07 x unit; 99 5 max). 00:120ms (settings in bits 00-07 are disabled) ; 01: setting unit 10ms; 02: setting unit 100ms; 03: setting unit 1s | |
| DM 6619 | 00 - 15 | Cycle time. 0000: variable (no minimum); 0001: up to 9999 (BCD). Minimal time is expressed in ms |
| Interrupt Processing (DM 6620 - DM 6639) take effect after the transfer to PC area, next time you start working | ||
| DM 6620 | 00 - 03 | Input constant for IR 00000 - IR 00002. 0: 0.8ms; 1: 1ms; 2: 2ms; 3: 4ms; 4: 8ms; 5: 16ms; 6: 32ms; 7: 64ms; 8: 128ms |
| 04 - 07 | Input constant for IR 00003 and IR 00004. Settings are same as with bits 00-03 | |
| 08 - 11 | Input constant for IR 00005 and IR 00006. Settings are same as with bits 00-03 | |
| 12 - 15 | Input constant for IR 00007 and IR 00011. Settings are same as with bits 00-03 | |
| DM 6621 | 00 - 07 | Input constant for IR 001. 0: 0.8ms; 1: 1ms; 2: 2ms; 3: 4ms; 4: 8ms; 5: 16ms; 6: 32ms; 7: 64ms; 8: 128ms |
| 08 - 15 | Input constant for IR 002. Settings are same as with IR 001 | |
| DM 6622 | 00 - 07 | Input constant for IR 003. Settings are same as with IR 001 |
| 08 - 15 | Input constant for IR 004. Settings are same as with IR 001 | |
| DM 6623 | 00 - 07 | Input constant for IR 005. Settings are same as with IR 001 |
| 08 - 15 | Input constant for IR 006. Settings are same as with IR 001 | |
| DM 6624 | 00 - 07 | Input constant for IR 007. Settings are same as with IR 001 |
| DM 6625 | 00 - 07 | Input constant for IR 008. Settings are same as with IR 001 |
| 08 - 15 | Input constant for IR 009. Settings are same as with IR 001 | |
| DM 6626 - DM 6627 | 00 - 15 | Not used |
| DM 6628 | 00 - 03 | Interrupt enabled on IR 00000. (0: regular input; 1: interrupt input; 2: fast-reaction input) |
| 04 - 07 | Interrupt enabled on IR 00001. (0: regular input; 1: interrupt input; 2: fast-reaction input) | |
| 08 - 11 | Interrupt enabled on IR 00002. (0: regular input; 1: interrupt input; 2: fast-reaction input) | |
| 12 - 15 | Interrupt enabled on IR 00003. (0: regular input; 1: interrupt input; 2: fast-reaction input) | |
| High-speed counter settings (DM 6640-DM 6644) take effect after the transfer to PC area, next time you start working | ||
| DM 6640 - DM 6641 | 00 - 15 | Not used |
| DM 6642 | 00 - 03 | High-speed counter mode. 0: counting up/down; 4: incremental mode |
| 04 - 07 | High-speed counter reset mode. 0: Z phase and software reset; 1: software reset only | |
| 08 - 15 | High-speed counter enable. 0: high-speed counter not used; 1: high-speed counter used with settings 00-07 | |
| DM 6643 - DM 6644 | 00 - 15 | Not used |
| Peripheral port settings take effect after the transfer to PC area | ||
| DM 6645 - DM 6649 | 00 - 15 | Not used |
| DM 6650 | 00 - 07 | Port settings. 00: standard (1 start bit, even parity, 2 stop bits, 9600bps); 01: Settings in DM 6651 (settings other than this cause error and turn on AR 1302) |
| 08 - 11 | Area for 1:1 connection with a PC via peripheral port. 0: LR00-LR15 | |
| 12 - 15 | Modes of communication. 0: Host link; 2: one-to-one PC link (slave); 3: one-to-one PC link (master); 4: NT link (settings other than this cause error and turn on AR 1302) | |
| DM 6651 | 00 - 07 | Baud rate. 00: 1200 bps; 01: 2400 bps; 02: 4800 bps; 03: 9600 bps; 04: 19200 bps |
| 08 - 15 | Frame format (Start bits/Data bits/Stop bits/Parity). 00:1/7/1/even; 01:1/7/1/odd; 02:1/7/1/none; 03:1/7/2/even; 04:1/7/2/odd; 05:1/7/2/none; 06:1/7/1/even; 07:1/7/1/odd; 08:1/7/1/none; 09:1/7/2/even; 10:1/7/2/odd; 11:1/7/2/none (settings other than this cause error and turn on AR 1302) | |
| DM 6652 | 00 - 15 | Host Link Transmission Delay (0000 - 9999ms) (settings other than this cause error and turn on AR 1302) |
| DM 6653 | 00 - 07 | Host Link (00 - 31 BCD) (settings other than this cause error and turn on AR 1302) |
| 08 - 15 | Not used | |
| DM 6654 | 00 - 15 | Not used |
| Error log settings (DM 6655) take effect after the transfer to PLC controller | ||
| DM 6655 | 00 - 03 | Style. 0: move after 7 records; 1: keep only first 7 (no moving); 2-F: no records |
| 04 - 07 | Not used | |
| 08 - 11 | Cycle Time monitor Enable. 0: detect long cycles as non-fatal errors; 1: do not detect long cycles | |
| 12 - 15 | Not used | |
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